Graphical and/or textual models are used in a multitude of areas of engineering and design to design, test and verify systems applicable to almost all fields of human endeavor, from biological systems, to mechanical and/or electrical systems, to finance and statistics applications. Model-based design typically involves representing a real-world system using a model, which model may then be tested, improved, and/or used to implement the actual system.
Logic or structure of a model or of any generic software and/or hardware program or module may be represented as a control flow graph (CFG). A CFG is a directed graph, in which nodes represent computational statements, elements or expressions, and edges represent transfer of control between nodes. A control flow typically includes all possible execution paths, and each possible execution path of the module has a corresponding path from the entry to the exit node of the graph. In general, a control flow graph is one of many possible representations of a software and/or hardware module and/or a real world system. The CFG may be an intermediate representation, derived from the original representation, or the software or graphical code itself may represent a control flow graph.
A control flow graph may be generated from a model by a modeling and/or high-level development tool. Such development tools may be general modeling environments or may be specifically tailored to a particular field of endeavor. A modeling tool may allow a user to create and edit a model, to execute it and/or to generate code from it.
Code generation may be done for simulation—that is, for executing and testing the model—or it may be a part of implementing a modeled system. The generated code may describe hardware and/or software implementations. A hardware implementation may be, for example, an electronic circuit. Modern day electronic circuits may be described using a hardware description language (HDL).
“HDL” refers to any language from a class of computer languages for formal description of hardware. It can describe hardware operation, its design, and tests to verify its operation by means of simulation. HDL provides a standard text-based expression of the temporal behavior and/or spatial structure of the hardware. The syntax and semantics of an HDL include explicit notations for expressing time and concurrency, which are primary attributes of hardware.
Using the hardware description in HDL code, a software program called an HDL synthesis tool can infer hardware logic operations from the hardware description statements and produce an equivalent list of generic hardware primitives to implement the specified behavior. In such a way, a textual and/or graphical model of a real-world system and/or a CFG representing the real world system may be automatically transformed into an implemented version of the real-world system or some of its parts.